This is the seventh edition of the CHERI instruction set architecture definition. Much of my contribution is to the experimental appendix.

The document is available at the official repository as UCAM-CL-TR-927 or by local mirror here.


  author  = {Watson, Robert N. M. and Neumann, Peter G. and Woodruff,
            Jonathan and Roe, Michael and Almatary, Hesham and Anderson,
            Jonathan and Baldwin, John and Chisnall, David and Davis, Brooks
            and Filardo, Nathaniel Wesley and Joannou, Alexandre and Laurie,
            Ben and Moore, Simon W. and Murdoch, Steven J. and Nienhuis,
            Kyndylan and Norton, Robert and Richardson, Alex and Rugg, Peter
            and Sewell, Peter and Son, Stacey and Xia, Hongyan},
  title   = {{Capability Hardware Enhanced RISC Instructions: CHERI
            Instruction-Set Architecture (Version 7)}},
  year    = {2018},
  month   = 10,
  url     = {},
  institution={University of Cambridge, Computer Laboratory},
  number  = {UCAM-CL-TR-927}