Peer Reviewed Papers

In reverse chronological order:

• Cornucopia Reloaded: Load Barriers for CHERI Heap Temporal Safety (2024)
• CHERIoT: Complete Memory Safety for Embedded Devices (2023)
• Cornucopia: Temporal Safety for CHERI Heaps (2020)
• CHERIvoke: Characterising Pointer Revocation Using CHERI Capabilities for Temporal Memory Safety (2019)
• CHERI Concentrate: Practical Compressed Capabilities (2019)
• CheriABI: Enforcing Valid Pointer Provenance and Minimizing Pointer Privilege in the POSIX C Run-time Environment (2019)
• Dyna: Toward a Self-Optimizing Declarative Language for Machine Learning Applications (2017)
• High-Entropy Visual Identification for Touch Screen Devices (2012)
• A Flexible Solver for Finite Arithmetic Circuits (2012)
• Use of Modality and Negation in Semantically-Informed Syntactic MT (2012)
• Dyna: Extending Datalog For Modern AI (2011)
• A Modality Lexicon and its use in Automatic Tagging (2010)
• Semantically-Informed Machine Translation: A Tree-Grafting Approach (2010)
• Styx Caching via Journal Callbacks (2009)

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My Ph.D. thesis (“Dyna 2: Towards a General Weighted Logic Language”, JHU Computer Science, Fall 2017) is available here. Parts of the work leading up to the thesis were also written up as smaller documents and self-published:

• Towards Weighted Default Reasoning (2017)
• Set-at-a-Time Solving in Weighted Logic Programs (2017)
• The Two-Counter Machine Strikes Again (2016)
• Tree Set Automata for Prolog Mode Analysis (2016)

Extended Abstracts and Similar

• Treating Machine Learning Algorithms As Declaratively Specified Circuits (2018)
• Rigid Tree Automata With Isolation (2016)

Invited Papers

• Research Report: Mitigating LangSec Problems With Capabilities (2016)

Talks

• CHERI: A Modern Capability Architecture (HOPE 2022)

Invited Talks

• 2022 snmalloc at cheritech22
• 2019 CHERI presentation at CMU
• vos-each: Query the AFS VLDB in Style (2015)

Technical Reports

• CHERIoT: Rethinking security for low-cost embedded systems (2023)
• Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 9) (2023)
• Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 8) (2020)
• CHERI C/C++ Programming Guide (2020)
• Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 7) (2018)
• Semantically Informed Machine Translation (2009)